Sr. Staff Systems Design Engineer - C/C++, Kernel development for AI/ML processor, performance modeling

Key Skills

Aartificial intelligence, Analytical and Problem solving, C Programming, C++, Design, Keras software library, Linux Operating system, Machine learning techniques, MATLAB Programming, Optimization, Python Programming, PyTorch, TensorFlow

Job Description

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_

THE ROLE:

We are looking for a dynamic, energetic Silicon Validation Lead to join our growing team in AI Group. 

In this role, the individual will be responsible for architecting and developing scalable silicon validation framework,defining kernel dataflow architecture, defining block level and system level tests for AI Engine (AIE) block for edge and cloud based platforms, ML model performance evaluation on AI Engine based silicon platforms, AIE instruction modeling, developing application specific kernels for AIE block, defining block and system level performance, developing performance tests, and test bring-up and debug on pre/post silicon platforms. This role expects the individual to drive the test plan, validation infrastructure, test bring-up and debug, driving automation framework and working with AIE architecture and design team to ensure functional and performance requirements are signed off. The team is dynamic and fast paced offering each of its members tremendous personal opportunity to grow their knowledge and skills in complex problem solving, product development and system engineering.

THE PERSON:

As a Silicon Validation Lead, you will drive innovative, scalable, and automated silicon validation framework for AMD’s AI Engine block. In this position, your expertise on silicon validation of AI processors will be necessary towards product development, definition, and root cause resolution.

KEY RESPONSIBILITIES:

• Define test plan, validation environment for VLIW based AI Engine processor architecture.
• Bring up emerging ML models based on CNN, transformers and characterize performance.
• Develop and validate VLIW-based processor systems on both pre-Silicon and post-Silicon platforms based on different use case applications
• Develop application specific reusable kernel code for AI Engine processors.
• Bring up test suite on pre/post silicon platform.
• Debug test failures on pre/post-silicon platform using trace interface, waveform viewer.
• Solve challenging technical problems with complex SoC based systems that integrate robust algorithms and features.
• Lead the discussion in the AI Engines Technical Solutions Team forum.
• Be involved in all aspects of integrated product development, including design, prototyping, implementation, testing, and product demonstration.
• Provide feedback on architecture, use cases, IP design, tools, and documentation.
• Create reference model using Matlab/Python libraries and verify functionality of kernels

PREFERRED EXPERIENCE:

• Proficiency in pre and post silicon validation of VLIW based vector processors.
• Proficiency in defining test plan, coverage metric for VLIW based vector processors.
• Experience in pre/post silicon validation of AI processors
• Experience in performance validation of ML models for edge and cloud based platforms.
• Proficiency in C++ based kernel development for distributed processors.
• Excellent C/C++ coding skills
• Experience in processor performance and memory performance characterization
• Experience in signal and power integrity, step load characterization
• Experience in creating system designs with compute engine, NOC and DDR/HBM
• Experience in system debug using Lauterbach, gdb, Valgrind and other debug tools is required.
• Experience in TensorFlow, PyTorch, Keras is a plus.
• Experience with static and dynamic power characterization is a plus.
• Familiarity with VLIW SIMD vector processor architecture,
• Familiarity in Matlab signal processing library and 5G toolbox is a plus.
• Strong communication skills.

ACADEMIC CREDENTIALS:

• BS with years experience or MS with years of experience 
• PhD in Electrical Engineering or Computer Engineering with years of experience

Location:

San Jose, Ca.