Entry Level Machine Learning Architect & Model Developer

Key Skills

Aartificial intelligence, Analytical and Problem solving, Bash scripting, C Programming, C++, Effective communication skills, English Proficiency, Machine learning techniques, Perl Programming, Python Programming, PyTorch, TensorFlow

Job Description

Machine Learning Architect & Model Developer

• Be an integral member of a small, highly-experienced team in R&D that is responsible for the architecture of new, differentiating, digital IP acceleration domains used in the design of advanced microcontrollers and microprocessors based chips. The technology for which this team is responsible provides market differentiation of a product portfolio with over four billion USD in annual revenue. Chances are that the car you drive, the intelligent devices that pervade your living space and the factories that produce the goods you use will contain one or more of the chips that you contribute to.
• We are part of MCU/MPU Engineering, a central design organization within NXP, developing products for multiple business lines in Automotive, Internet of Things (IoT), Networking, and Radio Frequency products, with expertise in hardware engineering, including architecture, IP, and full SoC Design.

Job Summary:

• NXP is looking for an AI/ML HW Architect who has good experience in C/C++ in order to model AI/ML accelerators
• The model will be written in C++ and will offer users of the HW accelerators a reference results for its operation
• The model will be integrated into a Linux based environment and interact with other compute models, to allow systemlevel modeling
• Beyond modeling existing or proposed accelerators, the candidate will be a part of a dynamic and innovative team, pushing the rapidly evolving AI/ML technology forward. The candidate will be an integral part of future innovation/research into this field.
• Responsibilities include C++ coding, studying of HW architectures and AI algorithms

Key Challenges:

• The AI/ML model is used for chip-level performance modeling, compiler development, and digital IP logic verification. Your will leverage broad skills in software, hardware, and architectures to solve problems spanning all of these domains.
• Fast problem solving will be a critical skill as the product life-cycle matures and gets closer to chip tape-out.
• Knowledge of industry trends and competitive solutions will be a necessary skill to develop for long term success in this role.

Cross functional aspects:

• You will be required to interact with many external teams including those leading the development of software tools and compilers, SOC performance models, and logic design and verification.
• Most of the external teams are located in other time-zones and regions of the world such as Europe or Asia so excellent communication skills are required to be successful in this role
• The local team is led by Fellows and Technical Directors with many years of domain experience to leverage and further develop skills useful as you advance your career

Job Qualifications:

• Degree: PhD preferred, Minimum MSEE
• Up to 2 years work experience, including internships
• Experience with C/C++ programming is required
• Experience with Matlab is required
• Knowledge and experience with Artificial Intelligence / Machine Learning (AI/ML) networks and development tools (TensorFlow, PyTorch, Glow, TVM) is a plus
• Knowledge of RISC-V instruction set architecture is a plus
• Experience with a variety of scripting languages, specifically Perl, python, and bash.
• Familiarity with the LLVM compiler is a plus, but not required
• Good written and verbal English communication skills are required

Job location: Austin, TX

NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.