Chief Architect of Heterogeneous Acceleration

Key Skills

Python Programming, Scala Programming, C++, Java Programming, Machine learning techniques, Data science techniques, SQL, Apache Hadoop, MapReduce, TensorFlow, PyTorch

Job Description

As a Chief Architect of Heterogeneous Acceleration, you will have a range of responsibilities including:

• Take the lead in the technical design, development, and planning of heterogeneous computing acceleration in the data storage field based on the technology trend of storage.
• Analyze the implementation of Huawei storage products, figure out the improvement points, and work with the technical office to make a solution, responsible for delivery on product projects or technical projects.
• Analyze the application scenarios and technical architecture of the product, find the acceleration solution for improving the key competitiveness of the product, and responsible for delivery it with purpose-build computing power of ASIC, FPGA, or GPU.
• Lead the development team to deliver the design and development of key technical projects with heterogeneous computing technologies, achieve the project performance, and transform the technology into the competitiveness of products and solutions.

Qualifications

• Solid basic knowledge of underlying hardware and software of computers; Deep understanding of computer architecture; Have deep working experience in bottom layer and system software architecture design, system test, etc.
• Have experience in developing firmware, especially in accelerating the development of software and hardware, such as DSP, GPU, or AI chip software and hardware optimization.
• Be able to debug, analyze, and optimize performance bottlenecks, figure out performance bottlenecks and make the performance improvements solution.
• Deep experience in parallel programming and development, independently develop the parallel programming framework, and familiar with various parallel programming models.
• Have more than 10 years of experience in large IT software development, and have at least experience in dedicated chip driver development and optimization.
• Be able to debug and optimize the performance of dedicated chips, and be familiar with the tool chain and chip acceleration principles. Have the ability of building tool chain of cross-compiling environment and software engineering ability, and be proficient in using GIT software code management tools.
• Have an in-depth understanding of the technical principles and architecture of GPU, DSP, or AI chips. Development experience is preferred.
• Have strong data structure and algorithm design capabilities.

Additional Information

All your information will be kept confidential according to EEO guidelines.